qat.plugins.NISQCompiler

The usage of this plugin is detailed in the user guide, in the compilation section

class qat.plugins.NISQCompiler(compiler: str = 'LazySynthesis', compiler_options: dict = None, target_gate_set: Union[list, str] = None)

A generic compiler for NISQ quantum circuits.

It compiles the circuit in three stages:

  • first it ensures that the input gates are translated down to 1-qubit and 2-qubit gates.

  • it then optimizes the number of entangling gates while adapting the quantum circuits to the architecture’s topology

  • finally, gates are translated into the target gate set and compressed when possible

The compiler utilizes Plugins that are already present in the QLM.

Note

The hardware specs of the target qpu will only be used to adapt the circuit to the target connectivity. If any gate set is specified inside the specs, it will be ignored. Gate set is set when the compiler is instantiated (see below).

Parameters
  • compiler (optional, str) – the “main” compilation Plugin to use. Default is LazySynthesis. Possible values are “LazySynthesis” or “Nnizer”.

  • compiler_options (optional, dict) – the arguments passed to the “main” compilation engine. The default is a preset for LazySynthesis. Refer to the documentation of qat.plugins.LazySynthesis or qat.plugins.Nnizer if you want to customize these options.

  • target_gate_set (optional, str or list) – Either a key in [‘IBM’, ‘IQM’, ‘IONS’] or a list of allowed gates. See below for more information on that argument.

Specifying gate sets:

The target gate set is specified either via a key refering to a known gate set or via a list of target gates.

The default gate set is CNOT + RX(pi/2) + RZ

The preset gate sets are the following:

  • “IBM”: CNOT + U3 where U3 is the tri-parametrized native gate of IBM’s processors

  • “IQM”: CZ + RX(pi/2) + RZ

  • “IONS”: XX(pi/2) + RX(pi/2) + RZ

The possible target gates (in the case you have specific needs) are:

  • CNOT, CZ, RX, RZ for the “standard” gates

  • Pauli rotations XX(pi/2) and ZZ(pi/2) which are refered by names “XX” and “ZZ” respectively.

  • RX(pi/2), refered by name “RX+”

  • U3 for IBM’s U3 gate

For instance, if you wish to specify a gate set where you allow CNOT, CZ, RX(pi/2) and RZ gates, you would write:

from qat.synthopline import NISQCompiler

compiler = NISQCompiler(target_gate_set=['CNOT', 'CZ', 'RX+', 'RZ'])

or if you allow ZZ(pi/2) gate together with U3 gates:

from qat.synthopline import NISQCompiler

compiler = NISQCompiler(target_gate_set=['ZZ', 'U3'])
compile(batch, specs)

Compiles a Batch of jobs